Jekyll2022-10-06T02:18:23+00:00https://hatimak.me/feed.xmlHatim KanchwalaHome to Hatim's thoughts, observations, learnings, and reports on his projectsihatimk Instagram archive to share with Arwa2022-10-06T00:53:00+00:002022-10-06T00:53:00+00:00https://hatimak.me/notes/ihatimk-archive-for-arwa<p>Hellooo Arwa!</p>
<p>I permanently deleted my Instagram account ihatimk before having met you. Now I wish I hadn’t done that because I want to share all of my posts, travels and captions with you. But luckily, I exported all of my data in an archive, which I have uploaded here to share with you. I hope you enjoy them, smile at the wittiness in some, marvel at the view of some, but most importantly, look forward to experiencing much more in the future, insha Allah.</p>
<p>My posts are <a href="https://hatimak.me/assets/instagram/ihatimk/content/posts.html">here</a>. <em>(Sorry that it looks so ugly-ish, I am working on a skincare routine to uplift the look)</em></p>
<p>Have fun!</p>
<!-- <div class="insta-grid">
<div class="insta-post">
<img src="https://hatimak.me/assets/instagram/ihatimk/media/posts/202203/277216270_810612347013884_5855078383163151193_n_17942009494820229.jpg">
<div class="insta-desc"><p>Something random from a random night 💡<br>Mar 23, 2022. Aachen, Germany 🇩🇪</p></div>
</div>
<div class="insta-post">
<img src="https://hatimak.me/assets/instagram/ihatimk/media/posts/202203/277216270_810612347013884_5855078383163151193_n_17942009494820229.jpg">
<div class="insta-desc"><p>Something random from a random night 💡<br>Mar 23, 2022. Aachen, Germany 🇩🇪</p></div>
</div>
<div class="insta-post">
<img src="https://hatimak.me/assets/instagram/ihatimk/media/posts/202203/277216270_810612347013884_5855078383163151193_n_17942009494820229.jpg">
<div class="insta-desc"><p>Something random from a random night 💡<br>Mar 23, 2022. Aachen, Germany 🇩🇪</p></div>
</div>
<div class="insta-post">
<img src="https://hatimak.me/assets/instagram/ihatimk/media/posts/202203/277216270_810612347013884_5855078383163151193_n_17942009494820229.jpg">
<div class="insta-desc"><p>Something random from a random night 💡<br>Mar 23, 2022. Aachen, Germany 🇩🇪</p></div>
</div>
</div> -->hatimHellooo Arwa!Adieu, Google Summer of Code 20172017-08-28T23:30:00+00:002017-08-28T23:30:00+00:00https://hatimak.me/notes/gsoc-final<p>The Google Summer of Code 2017 is now in its final stages, and I’d like to take a moment to look back at what goals I accomplished, what remains to be realised and what I learned.</p>
<p>The EDSAC Museum on FPGA project is part of a broader movement to revive interest in the early first generation British computer, the Electronic Delay Storage Automatic Calculator. 2017 will mark the 60th anniversary of the British Computing Society (BCS) whose founder, Maurice Wilkes, is the designer of the original EDSAC.</p>
<p>My GSoC project’s primary objective was to replicate the EDSAC on a FPGA. All of the work I did over the summer is hosted at <a href="http://github.com/librecores/gsoc-museum-edsac/">librecores/gsoc-museum-edsac</a> GitHub repository. The FPGA of choice was the open source and affordable board, called myStorm. It is equipped with a Lattice ICE40HX4K FPGA and an ARM Cortex M3 microcontroller. It is really like the Raspberry Pi or the Arduino of the FPGA world!</p>
<p>Even though the GSoC period is coming to a conclusion, the project is still very much a work-in-progress. I had set out with a rather ambitious set of project goals in my <a href="https://goo.gl/3q0uKa">original proposal</a> of which only a subset was actually realised in the prescribed time period. I guess when working with hardware, one can’t really anticipate timelines with much certainty! Nonetheless, significant lessons in project management and risk assessment/mitigation were learned.</p>
<p>My mentor, <a href="https://twitter.com/jeremypbennett">@jeremypbennett</a>, required me to maintain a schedule and a risk register from the start of the coding period. The schedule contained a table of work packages, planned and actual start and end dates. The work packages were supposed to be independent atomic tasks. The risk register was another table where possible risks, their likelihood of occurrence and their impact on the project were monitored. Once in every two weeks, my mentors, <a href="https://twitter.com/jeremypbennett">@jeremypbennett</a> and <a href="https://twitter.com/wallento">@wallento</a>, and I had a Hangouts session to discuss the schedule, assess and plan mitigation strategies for risks. This is really lightweight project management but goes a long way to ensure predictability and control.</p>
<p>As of this post, the EDSAC replica works in simulation. Almost all logic modules have been coded to follow the original architecture as closely as possible - the directory structure, module hierarchy, signal definitions and data flow. Most of EDSAC replica’s subsystems work independently on the myStorm board and have been tested on the board as well. A secondary goal of the project was to develop external interfaces that communicated to the FPGA over a standardised communication protocol. I gave these external interfaces a fancy name, I/O flavours. The communication protocol is developed, but the Verilog implementation and physical manufacturing of the hardware remains a task to be done. The detailed build instructions and toolchain installation instructions can be found in the project’s <a href="https://github.com/librecores/gsoc-museum-edsac/blob/dev/README.md">README.md</a>.</p>
<p>This GSoC has come to the sweetest of ends one can hope for - I have the distinct pleasure of presenting at <a href="http://chiphack.org">ChipHack EDSAC</a> and <a href="https://orconf.org">ORConf</a> this year which are being held from 6 to 10 Sept. in Hebden Bridge, UK as part of the Wuthering Bytes festival. ChipHack EDSAC is being organised by <a href="http://twitter.com/Embecosm">@Embecosm</a> and ORConf by <a href="https://twitter.com/FossiFoundation">@FossiFoundation</a>. Thanks are due to <a href="http://twitter.com/Embecosm">@Embecosm</a> and <a href="https://twitter.com/FossiFoundation">@FossiFoundation</a> for sponsoring me without which I would have certainly missed this lifetime opportunity. I am indebted to them. Looking forward to meeting some awesome people at ChipHack EDSAC and ORConf this year!</p>
<p>The primary channel for communication is over at <a href="https://gitter.im/librecores/gsoc-museum-edsac">Gitter</a>. If you prefer mail, the <a href="https://lists.librecores.org/listinfo/discussion">LibreCores discussion mailing list</a> is the central place, and I am personally available at <a href="mailto:hatim@hatimak.me">hatim@hatimak.me</a>. Please drop by if you have questions or are interested in contributing to the project. I’d be delighted to hear from you. If you notice any bugs or would like to suggest improvements, please do <a href="https://github.com/librecores/gsoc-museum-edsac/issues">open an issue</a>. The project will remain active for long after GSoC concludes.</p>
<p>I’d also recommend that you visit the <a href="https://forum.mystorm.uk">myStorm forum</a>. It is the most informative place to learn, track and discuss the development of the myStorm board. They are very helpful and responsive, and I hope myStorm reaches a broad global audience.</p>
<p>This post is incomplete without expressing gratitude to my mentors <a href="https://twitter.com/jeremypbennett">@jeremypbennett</a> and <a href="https://twitter.com/wallento">@wallento</a>. They have been most kind, patient and generous in offering me time, have been very encouraging whenever I panicked or was under pressure. Dear mentors, I am indelibly indebted to you!</p>
<div class="breaker"></div>
<p>References -</p>
<ul>
<li><a href="https://mystorm.uk">https://mystorm.uk</a></li>
<li>An informative <a href="https://nanode0000.wordpress.com/2017/08/16/getting-started-with-mystorm-blackice/">getting started blog post</a> for the BlackIce myStorm board by <a href="https://twitter.com/Monsonite">@Monosite</a>, one of its developers.</li>
<li><a href="http://www.clifford.at/yosys/">http://www.clifford.at/yosys/</a></li>
<li><a href="http://www.clifford.at/icestorm/">http://www.clifford.at/icestorm/</a></li>
<li>Archived public threads from LibreCores discussion mailing list -
<ul>
<li><a href="https://lists.librecores.org/pipermail/discussion/2017-June/000373.html">https://lists.librecores.org/pipermail/discussion/2017-June/000373.html</a></li>
<li><a href="https://lists.librecores.org/pipermail/discussion/2017-May/000351.html">https://lists.librecores.org/pipermail/discussion/2017-May/000351.html</a></li>
<li><a href="https://lists.librecores.org/pipermail/discussion/2017-April/000321.html">https://lists.librecores.org/pipermail/discussion/2017-April/000321.html</a></li>
<li><a href="https://lists.librecores.org/pipermail/discussion/2017-March/000311.html">https://lists.librecores.org/pipermail/discussion/2017-March/000311.html</a></li>
<li><a href="https://lists.librecores.org/pipermail/discussion/2017-March/000287.html">https://lists.librecores.org/pipermail/discussion/2017-March/000287.html</a></li>
</ul>
</li>
<li>myStorm forum posts -
<ul>
<li><a href="https://forum.mystorm.uk/t/blackice-mystorm-board-not-getting-programmed/214/20">https://forum.mystorm.uk/t/blackice-mystorm-board-not-getting-programmed/214/20</a></li>
<li><a href="https://forum.mystorm.uk/t/signal-edges-dont-trigger-always-blocks/220/2">https://forum.mystorm.uk/t/signal-edges-dont-trigger-always-blocks/220/2</a></li>
</ul>
</li>
</ul>hatimThe Google Summer of Code 2017 is now in its final stages, and I’d like to take a moment to look back at what goals I accomplished, what remains to be realised and what I learned.EDSAC FPGA Community Bonding Period and Coding Kickoff2017-06-08T23:30:00+00:002017-06-08T23:30:00+00:00https://hatimak.me/notes/gsoc-community-bonding<p><strong>Last week the Community Bonding Period of GSoC concluded, and we are now into the first phase of the Coding Period. It was an exciting one month of Community Bonding full of learning and meeting new people from around the world. The Community Bonding Period is primarily a preparatory phase for the students to define clearer project milestones, fine tune timelines, learn about organisation’s processes, fix coding practices, and set up channels for communication.</strong></p>
<p>This period is also for the students to get to know the community they are now a part of - their mentors, their organisation, other GSoC-ers - and arguably that’s the most fun part! I met a couple of interesting people on the unofficial GSoC 2017 Telegram group. They were from diverse cultural backgrounds, and it was quite a delightful experience talking with them.</p>
<p><strong>Most of my time during the Community Bonding Period was spent in studying EDSAC in even more depth. Soon after, I prepared plans for the coming months based on lightweight project management techniques my mentor introduced me to. Milestones are broken down into actionable tasks with a turnaround time of 1-3 days. These tasks are bundled into mini-milestones with a resolution of 5-15 days. A “risk register” is prepared to list probable risks, their likelihood of occurrence, impact on project and mitigation strategies.</strong></p>
<p><strong>Project management practices are generally perceived as cumbersome and unproductive (because from a programmer’s point of view no code is produced). From what I am experiencing now, I am pretty convinced that regularly investing bite-sized chunks of time and effort into proper planning (perhaps for shorter horizons) is a productive activity that leads to higher confidence and serves as an umbrella on a rainy day.</strong></p>
<p>My mentors, <a href="https://twitter.com/jeremypbennett" target="_blank">@jeremypbennett</a> and <a href="https://twitter.com/wallento" target="_blank">@wallento</a>, and I had a few Hangouts meetings, we have one every two weeks. It was a pleasant meeting principally focused on work, but sprinkled with informal cultural exchanges. This is one aspect of open-source and GSoC that I absolutely love - it brings together people willing to learn and transcends cultural and geographical boundaries!</p>
<p>A couple of days ago the open-source <a href="https://mystorm.uk/" target="_blank">myStorm</a> “BlackIce” FPGA board arrived. My mentor shipped it from his office in London along with a kind note. The myStorm FPGA board is a low-cost development platform aimed at engineers, hobbyists and electronics students. It uses a Lattice ICE40HX4K FPGA along with a supporting ARM microcontroller. It’s designed to be used with Clifford Wolf’s <a href="http://www.clifford.at/icestorm/" target="_blank">ICE Storm</a> toolset. I am quite thrilled that BlackIce will be a modern home to a reimagined EDSAC!</p>
<div class="side-by-side">
<div class="toleft">
<blockquote class="twitter-tweet" data-lang="en"><p lang="en" dir="ltr">A "storm" has arrived! Big thank you to <a href="https://twitter.com/jeremypbennett">@jeremypbennett</a> 😀 <a href="https://twitter.com/hashtag/edsac?src=hash">#edsac</a> <a href="https://twitter.com/hashtag/gsoc?src=hash">#gsoc</a> (1/2) <a href="https://t.co/CrR9sQYUAS">pic.twitter.com/CrR9sQYUAS</a></p>— Hatim Kanchwala (@ihatimk) <a href="https://twitter.com/ihatimk/status/871638013071114241">June 5, 2017</a></blockquote> <script async="" src="//platform.twitter.com/widgets.js" charset="utf-8"></script>
</div>
<div class="toright">
<blockquote class="twitter-tweet" data-conversation="none" data-lang="en"><p lang="en" dir="ltr">The myStorm BlackIce FPGA board. Isn't it gorgeous! 😍 Future home of a modern reimagining of <a href="https://twitter.com/hashtag/edsac?src=hash">#edsac</a>! 😉 😀 <a href="https://twitter.com/hashtag/gsoc?src=hash">#gsoc</a> (2/2) <a href="https://t.co/3l0VAH5EY0">pic.twitter.com/3l0VAH5EY0</a></p>— Hatim Kanchwala (@ihatimk) <a href="https://twitter.com/ihatimk/status/871661783995490305">June 5, 2017</a></blockquote> <script async="" src="//platform.twitter.com/widgets.js" charset="utf-8"></script>
</div>
</div>
<p><strong>A sizeable chunk of my Community Bonding time was spent watching video recordings of talks at <a href="https://www.youtube.com/playlist?list=PLUg3wIOWD8yrthOTgkGS17PJ7eweEp7W_" target="_blank">ORCONF 2016</a>. “<a href="https://youtu.be/Q2w5outo6DI?list=PLUg3wIOWD8yrthOTgkGS17PJ7eweEp7W_" target="_blank">Formal Verification with Yosys-SMTBMC</a>” and “<a href="https://youtu.be/scZbmkRGWsY?list=PLUg3wIOWD8yrthOTgkGS17PJ7eweEp7W_" target="_blank">LibreCores CI</a>” are top among my favourites with “<a href="https://youtu.be/pxorarLnQYc?list=PLUg3wIOWD8yrthOTgkGS17PJ7eweEp7W_" target="_blank">Cocotb</a>” and “<a href="https://youtu.be/pKlJWe_HKPM?list=PLUg3wIOWD8yrthOTgkGS17PJ7eweEp7W_" target="_blank">FuseSoc</a>” following closely. Two challenges in the EDSAC FPGA Museum project that have always intrigued me are - (a) how do I verify that my replica is correct, and (b) since documentation on EDSAC is sparse, how do I write automated tests. So, I was naturally attracted to <a href="http://www.clifford.at/papers/2016/yosys-smtbmc/" target="_blank">formal verification</a> and <a href="https://www.librecores.org/static/librecores-ci" target="_blank">LibreCores CI</a>. During a Gitter session, <a href="https://twitter.com/wallento" target="_blank">@wallento</a> pointed me to <a href="http://potential.ventures/cocotb/" target="_blank">Cocotb</a>. I hope I get a chance to learn and use these technologies in my GSoC project.</strong></p>
<p>I currently have most of EDSAC’s functional logic mapped, and corresponding stub modules in Verilog are ready. I have partitioned these modules hierarchically into three levels -</p>
<ol>
<li>L3 Atomic Modules: fundamental blocks using which higher levels are built,</li>
<li>L2 Logic Modules: blocks that are the crux of the machine, and</li>
<li>L1 Subsystems: ALU, control section, memory and I/O.</li>
</ol>
<p>The L3 atomic modules have been coded and simulated using iverilog and GTKWave. Initial documentation includes a description of the <a href="https://github.com/librecores/gsoc-museum-edsac/blob/dev/doc/instruction_set.md" target="_blank">Instruction Set</a> and <a href="https://github.com/librecores/gsoc-museum-edsac/blob/dev/doc/gating_emfs.md" target="_blank">control signals</a>. A few L2 modules have also been coded and simulated.</p>
<p>For the next few weeks, my objective is to build the remainder of L2 modules making up the ALU, Control Section and Memory L1 Subsystems. I will then move on to developing a rudimentary external I/O hardware with off-the-shelf electronic components. The objective is to have a bare bones replica of EDSAC based on a functional specification. To verify the initial correctness of my FPGA model, I will take the route Prof. Martin Campbell-Kelly took with his EDSAC simulator - validate against some of the five original programs, for which both the instructions and photographs of the output exist in physical form.</p>
<p><strong>You can follow my work progress at <a href="https://github.com/librecores/gsoc-museum-edsac" target="_blank">librecores/gsoc-museum-edsac</a>. We use Gitter as our primary mode of communication. If you’d like to get in touch, you are invited to join <a href="https://gitter.im/librecores/gsoc-museum-edsac?utm_source=share-link&utm_medium=link&utm_campaign=share-link" target="_blank">librecores/gsoc-museum-edsac</a> on Gitter, or if you prefer mail, then I’d be delighted to receive you at <a href="mailto:hatim@hatimak.me" target="_blank">hatim@hatimak.me</a>.</strong></p>hatimLast week the Community Bonding Period of GSoC concluded, and we are now into the first phase of the Coding Period. It was an exciting one month of Community Bonding full of learning and meeting new people from around the world. The Community Bonding Period is primarily a preparatory phase for the students to define clearer project milestones, fine tune timelines, learn about organisation’s processes, fix coding practices, and set up channels for communication.Lessons in Proposal Writing from Google Summer of Code Experience2017-05-18T22:44:00+00:002017-05-18T22:44:00+00:00https://hatimak.me/notes/gsoc-proposal-lessons<p><strong>My proposal with the Free and Open Source Silicon (<a href="https://fossi-foundation.org/" target="_blank">FOSSi</a>) Foundation has been accepted for Google Summer of Code 2017. I will be replicating the Electronic Delay Storage Automatic Calculator (EDSAC) on an FPGA. Read my project abstract <a href="https://goo.gl/MsQ1kC" target="_blank">here</a>.</strong></p>
<p>EDSAC was designed in 1947 by Maurice Wilkes and his team at the University of Cambridge, Mathematical Laboratory. It was the world’s first complete and fully operational stored-program computer. It was notable for its use of ultrasonic mercury delay tanks as memory. Reconstruction of the original machine is underway at The National Museum of Computing (<a href="http://www.tnmoc.org/special-projects/edsac" target="_blank">TNMoC</a>), Bletchley Park, UK and should be operational by late 2017. The ultimate objective of my GSoC project is to make the historic computer accessible to and reproducible by a new generation of computer architects and engineers.</p>
<p><strong>In what follows, I will be sharing the lessons I learned while writing my GSoC proposal. I received very positive feedback from FOSSi and praise from peers. I have tried to give context to the points by narrating my experiences wherever relevant. Find the final draft of my proposal <a href="https://goo.gl/3q0uKa" target="_blank">here</a>. Hope it helps you!</strong></p>
<h2 id="1-start-early-move-rapidly">1. Start early, move rapidly</h2>
<p><strong>Every candidate begins with the same amount of time. Given the will to persevere in the face of stiff competition, the success of the endeavour then depends on the prudent use of time.</strong></p>
<p>After I had decided to apply for the “FPGA Museum” project with FOSSi Foundation, I contacted previous year’s participants with FOSSi requesting them to share their experiences and any tips they might have for me. Most of them responded promptly, and almost everyone agreed that putting significant effort in writing the proposal leads to a maximum chance of selection. The insights these participants shared helped me cover considerable ground in a short span of time.</p>
<h2 id="2-identify-competitive-advantage">2. Identify competitive advantage</h2>
<p><strong>“All value is relative.” The organisation will choose the candidate that they think brings the most value to the community as compared to others. Thus, you must recognise any advantages you may have over the competition and capitalise on it.</strong></p>
<p>Early on while studying EDSAC, I realised that documentation was scarce. If I were to write a compelling proposal and succeed in my project, then I would require more resources to aid in my study. That’s when I contacted Victoria Alexander of TNMoC requesting her to put me in touch with someone on the EDSAC Replica Project team. Soon after Bill Purvis (Logic Designer, EDSAC Replica Project) responded and generously shared <a href="http://www.billp.org/ccs/Edsac/" target="_blank">his repository</a> of documents on EDSAC. A little while after, I contacted Prof. Martin Campbell-Kelly who had developed the <a href="http://www.dcs.warwick.ac.uk/~edsac/" target="_blank">EDSAC simulator</a>. He graciously shared an article explaining how the simulator was verified. These documents were crucial to my understanding of the machine.</p>
<p>I saw the scarcity of documentation on EDSAC as an opportunity which I ceased by contacting TNMoC and Prof. Martin. I recognised that if they responded, I would have an advantage over the competition.</p>
<h2 id="3-differentiate-from-competition">3. Differentiate from competition</h2>
<p><strong>A competitive advantage is a safe threshold to maintain, but it is nothing that the game cannot surmount. If your proposal is to stand out, then it must offer innovative solutions to the problems your project is addressing.</strong></p>
<p>My mentor has always been keen on exploring inexpensive external hardware to act as modern proxies for the ancient interfaces of EDSAC. Over discussions on the mailing list (<a href="https://lists.librecores.org/pipermail/discussion/2017-March/000289.html" target="_blank">here</a> and <a href="https://lists.librecores.org/pipermail/discussion/2017-March/000290.html" target="_blank">here</a>), he suggested a low-cost thermal printer and a business card reader could make a proxy for the paper tape reader/writer of EDSAC. Such a setup is certainly a faithful replica of the original mechanisms. But I thought, to make the project and its components readily accessible to and reproducible by a broader community, we ought to take a more flexible route.</p>
<p>I proposed a standard protocol for all I/O communication across the FPGA external pins, leading to a more modular architecture such that the (un)availability of components at user-end will not be a barrier. As long as the external interfaces conform to the standard, users can even design their own. My mentor appreciated the idea of standardisation. That was my innovative solution to the problem of external interfaces.</p>
<h2 id="4-your-proposal-is-your-reflection">4. Your proposal is your reflection</h2>
<p><strong>Your proposal is the primary lens through which your organisation will perceive you. It should portray you as someone capable of comprehending the project and its requirements, formulating an idea, judiciously allocating time, and executing the plan without a need for much hand-holding.</strong></p>
<p><strong>Structure your proposal coherently, demonstrate your understanding of the subject, clearly define project milestones and deliverables, devise a mitigating strategy for conceivable risks, and augment content with visualisations wherever feasible.</strong></p>
<h2 id="5-seek-feedback-and-iterate">5. Seek feedback and iterate</h2>
<p><strong>It is imperative to continually iterate and improve because the competition will not be resting. Solicit feedback especially from the organisation you are applying to because they can spot irregularities very quickly and point you in the correct direction. Feedback from peers can expose, among other things, a lack of clarity in expressing ideas, structural inconsistencies, and incorrect use of English.</strong></p>hatimMy proposal with the Free and Open Source Silicon (FOSSi) Foundation has been accepted for Google Summer of Code 2017. I will be replicating the Electronic Delay Storage Automatic Calculator (EDSAC) on an FPGA. Read my project abstract here.